The present invention relates to photolithography, and more specifically to a method of forming resist images by utilizing a grid mask containing a periodic set of images to produce a nested set of identical images over an entire chip surface or selected regions thereof and then removing any unwanted portions of said nested set of identical images with a trim mask.
As the minimum feature size in semiconductor integrated circuit technology is pushed near or below the wavelength of light used in micro-lithographic projection printing, diffraction effects introduce significant differences between the patterns used on micro-lithographic reticles and the resulting printed structures on a semiconductor wafer. Similarly, the smaller the circuit elements become, the more difficult it is to create the desired pattern shapes on the wafer due to factors such as localized etch variations, mask distortions, lens distortions, topography variations, and non-uniform material composition.
These physical factors introduce deviations in isolated versus nested printed structures, with the degree of variation being highly dependent on the degree of proximity of nearby shapes. In order to maximize circuit performance and speed, it has been found highly desirable to make the device structure dimensions as identical as possible, e.g. to try to make isolated gates and nested gates print as identically as possible. These effects become increasing important as the physical dimensions of the circuit elements decrease.
Across Chip Linewidth Variation (ACLV) is one major problem in semiconductor device manufacturing. Image size variations can affect transistor speed matching and resistivity and conductance matching from one portion of the chip to another. One significant cause of printed pattern size variation is the diffraction component of imaging, which results in structures on a reticle being imaged differently depending upon what other structures are present in the local neighborhood.
A common form of this is differences between nested and isolated images. FIG. 1 shows a prior art mask intended to produce holes in a negative resist. FIG. 2 shows the resultant resist images with the isolated images being overexposed and smaller. In actuality, the printed shapes in FIG. 2 occur as rounded structures because each corner on a mask ends up as a printed rounded corner on the wafer. The isolated structure prints much differently than a nested structure. The degree that they print differently depends on the degree of proximity of nearby structures, as well as the size of nearby structures, the periodicity of nearby structures, and exposure tool illumination conditions.
It should be further appreciated that prior art photolithographic techniques require multiple custom masks to provide a nested and isolated image on the surface of a semiconductor wafer having improved ACLV. An example of such a technique, is described, for example, in U.S. Pat. No. 5,424,154 which discloses a method of enhancing the lithographic resolution of randomly laid out isolated structures, wherein a first mask comprising an active layer with isolated features such as gates is used. Portions of the active layer have a reduced dimension typical of periodic structures. The first mask disclosed in the ""154 patent additionally has complementary features provided along side the reduced active features to provide periodicity. Accordingly, the resolution of the lithographic process is enhanced, and other enhanced resolution technologies additionally can be used to best advantage to form a patterned photosensitive layer having isolated features of reduced width. The photosensitive resist is then exposed to a second mask which exposes the complementary features so that they are removed from the latent image in the photosensitive resist. This second exposure reportedly improves resolution by enhancing contrast between exposed and unexposed regions.
While such prior art techniques can be used in printing resist images, it would be highly desirable to provide a method of forming resist images using a non-custom first mask (or a non-custom common grid mask useable for many designs) and a single custom trim mask to provide the nested and isolated images. This provides a significant reduction in manufacturing cost.
The present invention provides a method of overcoming the problems associated with prior art photolithographic techniques, especially those caused by ACLV, by first printing a set of nested images using a grid mask over the entire surface of a semiconductor chip or critical regions thereof; and then removing unwanted images with a trim mask. The grid mask can be fabricated and selected to be a nearly perfect mask for each chip size, so only the less critical trim mask is personalized for a given chip design.
Specifically, the method of the present invention comprises the steps of:
(a) exposing a photosensitive resist to a first mask having a grid pattern image thereon so as to form a repeating pattern image on said photosensitive resist; and
(b) exposing the photosensitive resist containing said repeating pattern image to a trim mask having a predetermined pattern thereon so as to remove unwanted portions of the repeating pattern image in said photosensitive resist.